Getting back to our core memory, so far we have seven cores to represent one character. The character could be a number or letter or a special character such as a '?' or '$'. There are standard codes for these characters, such as ASCII or EBCDIC, more on this in another article. We are going to need a lot more than 1 character for our memory, we need to load a program into the memory plus some data to work on! At the time, early digital computers would have had a memory capacity of perhaps 28K bits. This means 28,000 cores are used in a 7-bit 'stack' of core planes, one for each bit. Each plane would be made up of a matrix of 64x64 cores, giving 4,096 separate addresses. You could visualise a stack as being like a square multilayer cake, each layer representing all the addresses for one bit. You may have heard the term 'stack' today, used interchangeably with 'core' to mean the main storage, or memory, as opposed to 'mass storage' which we mentioned above.



As you are probably aware, we 'write' data to memory, and 'read' from memory. In order to write data to core memory, we must set the magnetic field in the core to be in a certain direction. To do this we have wires passing through the core through which we can pass a current. The action is similar to that in an electric motor, where the current in the coil induces a magnetic field, which causes the motor to turn. We are not going into electromagnetism in detail here, just to say that a magnetic field will occur when we pass a pulse of electricity through the wire.

Following from this, we will need another wire through the core to provide a means of reading what the data stored in the core is. You will, of course, have realised that, once more, we have a classic case of 'binary'. The core can be in one of two states, switched one way or the other, which we can identify as 1 or 0.

We are not finished yet! As mentioned above, a core plane represents 4K (4,096) addresses for one bit of the 7-bit character. Looking at, say, the plane for bit 0, we have a matrix of 64x64 cores arranged in 64 rows for each of 64 columns.. In order to select a particular core, or address, we can run a wire through each of 64 cores in the first row, another wire through the 64 cores in the second row, and so on, until we have 64 wires, one for each row. We can call these the X-address lines. Also we can run a further 64 wires through the 64 columns of cores in the matrix, and call these the Y-address lines. Now we can use one X-line, and one Y-line to select a particular core.

If you are still with me, now remember we were looking at the core plane for one bit. The other 6 bits in the stack are connected up in the same way. The X and Y address lines are continued through each plane, so that the same core location is selected in each plane. This gives a 7-bit (core) selection for each of the 4K addresses.

Another point we have discovered here, is how an address works. In this case of a core memory of 4K, we will need 128 address lines. These form the X- and Y-address lines, and are decoded from a 12-bit binary address. For example, address 0 would have all bits at 0, or 0000 0000 0000. An address of 1000 0000 0001 would be decimal 2048 + 1=2049. The range is 0000 0000 0000 to 1111 1111 1111, equivalent to 0 to 4,096 decimal. Bit values 1 to 32 would form the X-address (0-63) and bit values 64 to 2048 would form the Y-address. The address lines are decoded by logic from the 12 bits. From our previous look at AND gates and inverters, you could work out what the logic would look like to decode an address of, say, 64. This is not a compulsory exercise!

In Part 3 we will look at how we read and write in core memory.